The only honest way to answer "will it run on my chip" is with a measured RAM
high-water mark, not a parameter count. The table below is peak RAM — .bss
plus measured stack high-water from a real Cortex-M3 build under QEMU MPS2-AN385 — for
each of the six shipped model sizes. Reproducer:
python3 scripts/measure_ram.py --markdown.
| Model | Used for | RAM | STM32F103 $2–4 | RP2040 $4 |
STM32F411 $15 | STM32F7 $15–30 |
ESP32-S3 $5–10 |
|---|---|---|---|---|---|---|---|
| nano | Proves the engine fits the smallest chips | 14.5 KB | ✓ | ✓ | ✓ | ✓ | ✓ |
| small | Short keyword routing | 27.5 KB | no RAM | ✓ | ✓ | ✓ | ✓ |
| classifier | Narrow on-device classification heads | 52 KB | no | ✓ | ✓ | ✓ | ✓ |
| tinystories | Children's-story-shaped writing | 104 KB | no | no RAM | ✓ | ✓ | ✓ |
| mid | Mid-range writing for a specific topic | 205 KB | no | no | no RAM | ✓ | ✓ |
| prod (944K) | Full coherent prose | 411 KB | no | no | no RAM | no | ✓ |
"no RAM" means the flash budget is fine and the SRAM is not. That distinction matters when you are choosing a part: flash is usually the cheaper problem to solve.
The part that is actually silicon-tested
One board, and we are specific about it because the difference between "builds for" and "runs on" is where most edge-AI claims quietly fail. The 944,000-parameter checkpoint runs on a physical ESP32-WROOM-32 — 4 MB flash, no PSRAM — generating coherent text fully offline at about 1.0 token per second at a 240 MHz core and 80 MHz flash. Getting there needed the context window cut to 24 tokens, which brings the working state to about 159 KB and inside the part's internal RAM. Throughput is flash-bound: roughly 271 KB of ternary weights are streamed from SPI flash for every token.
Everything else in the table is a build plus QEMU. That is a real check — it executes the actual cross-compiled ELF — but it is not silicon, and we do not call it silicon.
Choosing a part
| If your constraint is… | Then… |
|---|---|
| Under 32 KB of SRAM, a couple of dollars a unit | The nano or small model. STM32F103-class parts run the engine, and keyword routing is a real job. |
| A classification head on a sensor stream | Atome LM EDGE rather than the language model — 15,444 B of total flash and 3,072 B of runtime RAM for a 6,567-parameter network. See the TFLite Micro comparison. |
| Generated text, offline, on a hobby-priced board | ESP32-S3 or a WROOM-32. This is the only path today for the full 944K model. |
| A part that must be certified | Any of the above, and read how parity is proved first — that is usually the deciding property, not the footprint. |
What has not been measured on hardware
Joules per token. We have not put a Joulescope or a PPK2 on a board and measured energy, so every energy claim you might expect on a page like this is missing on purpose. The measurement protocol is written and frozen in advance — fixed clock, fixed voltage, fixed wait-states, DWT bracket, at least 100 iterations, median and p95, raw CSV required — precisely so the numbers cannot be tuned after the fact when the board arrives.
Questions
Which microcontrollers can run Atome LM?
Measured peak RAM decides it. The nano model needs 14.5 KB and runs on an STM32F103; small needs 27.5 KB and needs an RP2040 or better; the classifier model needs 52 KB; tinystories 104 KB; mid 205 KB; and the full 944K production model needs 411 KB, which in practice means an ESP32-S3 or a WROOM-32 with the context reduced to 24 tokens.
Has Atome LM been tested on real silicon?
On one board: a physical ESP32-WROOM-32 with 4 MB flash and no PSRAM, generating coherent text offline at about 1.0 token per second. Everything else in the compatibility table is a cross-compiled build executed under QEMU, which is a real check but is not silicon.
How much energy does one token cost?
Not measured. No Joulescope or PPK2 trace has been taken on a board, so no energy figure is published. The measurement protocol was fixed in writing before the hardware arrived so the numbers cannot be tuned afterwards.
Does Atome LM need PSRAM?
Not for the smaller models. The 944K model runs on a WROOM-32 without PSRAM by cutting the context window to 24 tokens, which puts the working state at about 159 KB. A community member also ran it on an ESP32-S2 with external SPI PSRAM, much more slowly.