This page exists because a project that only publishes its wins is not publishing evidence, it is publishing advertising. Everything below is a measured negative or an admitted gap, and all of it is quotable against us.
The architecture loses above about a million parameters
On TinyStories at 3,000 steps, single seed: at 60,000 parameters the routed-ternary block reaches 6.31 perplexity against 8.12 for a parameter-matched FP32 transformer — about 22% better. At 944,000 parameters the result reverses: the plain float model wins by about 11%, 2.54 against 2.87. The ternary inductive bias substitutes for capacity when there is very little of it, and constrains capacity when there is enough. Anyone choosing between Atome LM and a small float transformer above 1M parameters should choose the float transformer.
Single seed. A multi-seed run is pending. A one-seed perplexity comparison is a direction, not a result, and we would not accept it from anybody else.
Accuracy against TensorFlow Lite for Microcontrollers is a tie
0.9095 ± 0.0077 against 0.9097 ± 0.0154 on UCI HAR, leak-free subject-wise split, 5 seeds. The paired difference is -0.000204 against a 2·SE band of 0.017222. Not a win, in either direction. Full table.
An earlier version of that comparison reported a win from a single seed. It was retracted. If you find an Atome accuracy claim on a slide or in an old README that quotes a single number against a TFLite Micro constant, this page supersedes it.
Per-window latency is a loss
On identical arithmetic, our convolution is 2.89× slower than CMSIS-NN — 9.13 cycles per multiply-accumulate against 3.13. Three SIMD variants of the inner loop were tried and all three were slower than the scalar code. If your inference is one-shot rather than a sliding window, that is the number that applies to you, and it is not in our favour.
Nothing here is a silicon measurement
Every cycle count on this site comes from Unicorn 2.1.4 against the ARM DDI 0403E cycle table. 61% of executed instructions are not in that table and default to one cycle, so the absolutes are lower bounds. Both arms of every comparison run on the same harness, which is why the ratios are quoted and the absolutes are hedged. Two older latency figures were published and then withdrawn — 414,493 cycles and 1,027,223 cycles — because the harness that produced them never executed an inference at all.
Energy has never been measured
No Joulescope, no PPK2, no board. There is no Joules-per-token figure for Atome LM because nobody has taken one. The protocol is written and frozen — fixed clock, voltage, flags and wait-states, DWT bracket on prediction and emission separately, at least 100 iterations, median and p95, raw CSV — so that when a board does arrive the method cannot be adjusted to suit the answer.
X-CUBE-AI has never been run
ST's stm32ai needs an account we do not have. What is measured is
CMSIS-NN v4.1.0, the kernel library X-CUBE-AI generates underneath, which is a lower
bound on the tool's cost. Any X-CUBE-AI number attached to Atome LM anywhere is
published, not measured by us.
Cortex-M33 is unmeasured
The ARMv8-M build faults under Unicorn's ARM model. Under QEMU
mps2-an505 the MPS2-mapped image runs without faulting but never reaches its
semihosting write, so no number comes out. Two previously published M33 figures were
withdrawn for the same reason as the M4 ones.
Some demo heads run on synthetic data
Several v2 application heads ship on physics-grounded synthetic data. They are labelled as such in the release and swappable with your own CSV. A held-out accuracy of 100% on generated data means the generator was simple, not that the model is remarkable. Voice keyword spotting works but is modest on a 20 KB ternary model.
One dataset, one board
Every EDGE accuracy figure is UCI HAR. One silicon test exists, on a ESP32-WROOM-32. Everything else in the hardware table is a cross-compiled build under QEMU. Neither of those generalises to your task or your part without being run on your task and your part.
What would change these verdicts
- A multi-seed TinyStories run would turn the 60K perplexity direction into a result or kill it.
- A board with an energy probe would produce the first Joules-per-decision number and settle whether the 27.3× per-decision saving survives contact with a real memory system.
- A second dataset would say whether the accuracy tie is a property of the engine or of UCI HAR.
Until those are run, they are listed here as gaps rather than described as roadmap.